With the rapid development of semiconductor technology, feature dimensions of semiconductor devices continue to decrease. The reduction of the feature dimensions of the semiconductor devices requires highly on performance of the semiconductor devices.
Currently, size of a metal-oxide semiconductor field-effect transistor (MOSFET) continues to become smaller. To meet reduction of the process node, a channel length of the MOSFET is gradually shortened. The reduction of the channel length has many advantages, such as increasing die density of a chip, and increasing switching speed of the MOSFET, etc.
However, the reduction of the channel length easily causes the control ability of a gate on the channel to become weakened, and it is more difficult to pinch off the channel by a gate voltage. As a result, a subthreshold leakage phenomenon, also known as a short-channel effect (SCE), is more likely to occur.
Therefore, to better meet requirements of scaling down the device size, the semiconductor process is gradually transitioning from the planar MOSFET to a three-dimensional transistor having higher-efficiency, such as a fin field effect transistor (FinFET). The FinFET has desired gate-to-channel control ability, and the short channel effect can be reduced.
However, a leakage phenomenon easily occurs when the FinFET is in operation, and the electrical performance of the FinFET is affected. How to improve the electrical performance of the FinFET has become an urgent issue to be solved. The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems.